Speculative Barriers With Transactional Memory

Transactional Memory (TM) is a synchronization model for parallel programming which provides optimistic concurrency control. Transactions can run in and are only serialized case of conflict. In this article we use hardware TM (HTM) to implement an speculative barrier (SB) replace the lock-based solution. SBs leverage HTM support elide barriers speculatively. When thread reaches SB, new xmlns:xlink="http://www.w3.org/1999/xlink">SB transaction started, keeping updates private thread, letting system detect potential conflicts. Once last corresponding speculative threads commit their changes. The main contributions work are: API implemented with extensions; procedure check speculation state between enable non-transactional codes; SB-aware conflict resolution enhancement where SB transactions stall on standard transaction; set guidelines derived from our experience using variety applications. We evaluated proposals two different architectures full-system simulator IBM Power8 server. Results show overall performance improvement over traditional barriers.